NASA Tests a New Space Processor That Is Five Hundred Times More Powerful Than Current Spacecraft Computers

Elementary

NASA and its partner, the company Microchip Technology, have been testing a new space computer chip since February 2026. The chip is called the High Performance Spaceflight Computing processor, or HPSC. It is small enough to fit in the palm of a hand but is 500 times more powerful than the radiation-hardened chips currently used in spacecraft.

Current spacecraft computers are very old by technology standards. They must be built to survive the extreme radiation of deep space, which limits the types of chips that can be used. The HPSC chip solves this problem by combining modern computing power with the special radiation-resistant design needed for space.

The most exciting feature of the HPSC chip is that it will allow spacecraft to use artificial intelligence in real time. Today, a rover or probe far from Earth must wait minutes or even hours for instructions from mission controllers. With the HPSC chip, the spacecraft can analyse its environment and respond immediately, without waiting.

Once the chip passes all tests, NASA plans to use it in a wide range of missions. These include Earth-orbiting satellites, rovers driving on the Moon or Mars, deep-space probes, and even future crewed habitats in deep space. Testing includes radiation, temperature, and shock trials that simulate the conditions electronics face far from our planet.

radiation-hardened: designed to continue working correctly even after exposure to the high levels of radiation found in space

processor: the part of a computer that carries out instructions and performs calculations

real time: happening immediately, without noticeable delay

mission controller: a person on Earth who monitors and sends instructions to a spacecraft or robot

simulate: to recreate the conditions of a real situation in a controlled environment for testing purposes

habitat: a place where people or animals live; in space, a structure designed for astronauts to live in

analyse: to examine something carefully in order to understand it or find information

extreme: very great or severe, much more intense than normal

Intermediate

NASA's Jet Propulsion Laboratory and its industry partner Microchip Technology have been conducting rigorous qualification testing on the High Performance Spaceflight Computing processor, a palm-sized radiation-hardened chip that delivers 500 times the computational performance of the electronics currently flying aboard NASA missions. Testing began in February 2026 and encompasses radiation, thermal, and mechanical-shock trials designed to replicate the hostile environment beyond Earth's magnetosphere.

The HPSC's performance leap addresses one of the deepest constraints in deep-space exploration: the mismatch between the raw complexity of distant environments and the extremely limited onboard intelligence available to respond to them. Current space-qualified processors are derivatives of architectures frozen two to three decades ago, kept intentionally behind the commercial frontier because proving radiation tolerance demands years of testing. The HPSC represents the first successful effort to close that generational gap while maintaining full radiation-hardened qualification.

The primary application that makes the chip transformative is autonomous AI inference. A rover operating on Mars faces a signal round-trip time of four to 24 minutes depending on planetary alignment, which makes reactive control from Earth impossible for fast-moving hazards such as unstable terrain, unexpected atmospheric events, or rapidly changing science targets. An onboard HPSC-level processor could run neural-network models locally, allowing a rover to navigate, identify mineral samples, and prioritise science observations without any human intervention.

Once certified, NASA intends to integrate the HPSC across a spectrum of mission classes. Earth orbiters will use it for real-time data reduction, allowing spacecraft to downlink only processed results rather than raw instrument dumps. Planetary rovers and landers will benefit most dramatically, gaining the ability to operate extended surface campaigns semi-independently. Future crewed habitats in cislunar or deep-space environments could use the chip to manage life-support and emergency-response systems in scenarios where communication latency makes Earth-directed intervention impractical.

qualification testing: a rigorous process of verification that a component meets all the required standards for its intended use

magnetosphere: the region of space surrounding Earth that is dominated by its magnetic field, shielding the planet from harmful solar radiation

autonomous: able to operate independently, making its own decisions without direct human control

inference: the process by which a trained artificial intelligence model applies its learning to new data to produce a result or decision

round-trip time: the total time it takes for a signal to travel from a sender to a destination and back again

neural network: a type of artificial intelligence modelled on the brain's structure, capable of learning patterns from data

cislunar: relating to the region of space between Earth and the Moon, or including the Moon's orbit

latency: the delay between a command being sent and the response being received

Advanced

NASA's Jet Propulsion Laboratory, in partnership with Microchip Technology under a collaborative research and development agreement initiated in 2022, has advanced the High Performance Spaceflight Computing processor from engineering design unit validation into full qualification testing as of February 2026, conducting radiation total ionising dose, single-event effects, thermal vacuum, and mechanical shock trials that together constitute the certification pathway for flight-grade space hardware. The chip is reported to deliver 500 times the computational throughput of the RadHard SPARC and PowerPC derivatives that currently constitute the computational backbone of most operational NASA spacecraft, while fitting within an envelope small enough to sit in the palm of a hand.

The performance discontinuity between commercial and space-grade computing is one of the most persistent structural constraints in deep-space systems engineering. Commercial silicon advances by roughly two transistor generations every four years, while the typical latency from architecture freeze to flight qualification for a radiation-hardened derivative is eight to twelve years, meaning that a processor entering service today embodies design choices made when current-generation AI accelerators did not exist as commercial products. The HPSC's design philosophy departs from this pattern by co-designing the radiation-hardening approach around a modern multicore RISC-V-adjacent architecture rather than hardening a legacy design post hoc.

The operational significance of on-board high-performance computing for deep-space applications is primarily expressed through the elimination of communication-latency-dependent decision loops. In the Jovian system, one-way signal travel time ranges from 33 to 53 minutes; at Uranus or Neptune, round-trip latency exceeds four hours. These figures render Earth-directed hazard-response and science-opportunism behaviours computationally impractical, necessitating spacecraft that can autonomously classify encountered environments, trigger contingency sequences, and optimise observation strategies through onboard machine-learning inference without ground-loop intervention. The HPSC's processing headroom is theoretically sufficient to run trimmed transformer-class models for terrain classification and sample prioritisation in real time.

Beyond individual mission architectures, the HPSC's certification will have systemic implications for how NASA structures its exploration risk tolerance. The agency has historically compensated for onboard computational poverty through elaborate ground-in-the-loop procedures, conservative operational margins, and long turnaround cycles between command epochs. An onboard processor capable of adaptive real-time science and hazard management restructures this calculus, enabling compressed operational timelines, reduced mission-operations staffing requirements, and the possibility of crewed deep-space habitats that manage life-critical subsystems autonomously during communication blackout windows - a prerequisite that no existing space-qualified processor can credibly satisfy.

total ionising dose: the cumulative energy deposited in a material by ionising radiation over time, a key test metric for space electronics

single-event effects: errors or malfunctions in electronic circuits caused by a single high-energy particle strike, common in the space radiation environment

flight-grade: meeting the rigorous reliability, performance, and environmental standards required for hardware that will actually fly in space

RISC-V: an open-source instruction-set architecture for computer processors, increasingly used as the basis for custom chip designs

post hoc: Latin: 'after this'; done or applied after the fact, as a modification to something already designed

ground-in-the-loop: an operational model in which human controllers on Earth must approve or initiate every significant action a spacecraft takes

transformer-class model: a type of large neural network architecture that excels at pattern recognition and language tasks and underpins modern AI systems

command epoch: a scheduled window during a spacecraft's operations when new instructions are uploaded from Earth

Beginner

Elementary

Intermediate

Advanced

NASA Tests a New Space Processor That Is Five Hundred Times More Powerful Than Current Spacecraft Computers

Multiple Choice

True or False

Fill in the Blank