Level 1 — Absolute Beginner
IBM is a big technology company. It made a new type of computer chip. The chip is very, very small.
The new chip can hold 100 billion tiny switches. These switches help the chip think fast. Computers with this chip will work much better.
IBM calls the new chip a NanoStack chip. It was shown to the world on June 25, 2026. It could be in computers in about five years.
- chip
- a tiny piece of material inside a computer that stores or processes information
- switch
- a small part inside a chip that turns on or off to process information
- IBM
- a large American technology company
- tiny
- very, very small
- billion
- the number one thousand million
- technology
- tools and machines made using science
- energy
- power used to make things work
- computer
- a machine that processes and stores information
Level 2 — Elementary
IBM, the American technology company, announced a new type of chip on June 25, 2026. The chip is called NanoStack. It uses an extremely small 0.7 nanometer process, smaller than any chip made before.
The NanoStack chip can fit about 100 billion transistors on an area the size of a fingernail. Transistors are tiny switches that help chips process information. This is almost twice as many transistors as the current best chips.
NanoStack chips can run 50 percent faster or use 70 percent less energy compared to today's best chips. IBM thinks this chip could be in real computers in about five years.
- nanometer
- a unit of measurement equal to one billionth of a meter
- transistor
- a tiny electronic switch inside a chip
- process
- a method used in manufacturing, or to work through information
- announce
- to tell people about something new or important
- fingernail
- the thin hard covering at the end of a finger
- compare
- to look at two things to find similarities or differences
- energy
- power used to make machines and devices work
- manufacture
- to make products using machines in a factory
Level 3 — Intermediate
IBM announced the NanoStack chip on June 25, 2026, marking the industry's first sub-one-nanometer node. The 0.7 nanometer process, equivalent to seven angstroms, achieves approximately 100 billion transistors on a fingernail-sized die, nearly double the density of current two-nanometer chips.
The NanoStack architecture uses a technique called three-dimensional sequential integration. Rather than placing transistors side by side on a flat surface, they are stacked vertically in layers. Different materials are used in each layer to optimize electrical properties, which enables the performance gains.
NanoStack delivers either a 50 percent improvement in processing speed or a 70 percent reduction in energy consumption compared to two-nanometer chips. IBM estimates that commercial production remains roughly five years away, but expects the technology to extend Moore's Law by at least a decade.
- node
- in chip manufacturing, the measurement describing transistor size and density
- angstrom
- a unit of length equal to one ten-billionth of a meter
- density
- the number of components packed into a given area or volume
- architecture
- the design structure of a computer chip or system
- sequential
- following in a specific order or one step after another
- vertical
- going straight up and down
- Moore's Law
- the observation that chip transistor counts roughly double every two years
- integration
- combining multiple components into one unified system
Level 4 — Advanced
IBM's NanoStack announcement on June 25, 2026 represents a meaningful inflection point in semiconductor scaling. At 0.7 nanometers, or seven angstroms, the process node breaks through the physical barriers that have historically constrained planar transistor architectures, pushing transistor density to approximately 100 billion per fingernail-sized die, approaching twice the density of leading two-nanometer nodes.
The enabling technology is three-dimensional sequential integration, in which individually optimized layers of transistors, each using distinct materials tuned to specific electrical properties, are vertically stacked atop one another. This approach sidesteps the lithographic limits of conventional lateral scaling by exploiting the vertical dimension, allowing further increases in functional density without proportional area expansion. The heterogeneous material stack also offers designers latitude to tune threshold voltage and carrier mobility independently per tier.
IBM projects either a 50 percent performance gain or a 70 percent energy efficiency improvement relative to two-nanometer reference chips, with commercial availability roughly five years out. If those projections are realized, NanoStack would extend Moore's Law by a decade or more, deferring the physical end of transistor scaling and preserving the compound-performance growth that underpins AI workloads, hyperscale data centers, and scientific computing applications.
- inflection point
- a moment when a significant change in a trend or direction occurs
- planar
- flat; relating to a two-dimensional surface
- lithographic
- relating to the photographic process used to print circuit patterns onto chips
- heterogeneous
- composed of different types of materials or elements
- threshold voltage
- the minimum voltage required to turn a transistor on
- carrier mobility
- the speed at which electrical charge moves through a semiconductor material
- tier
- a distinct level or layer within a stacked structure
- compound-performance growth
- the cumulative improvement in computing speed that accrues over successive chip generations
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